Taiwan Semiconductor Manufacturing Co. (TSMC) is increasing capital expenditure allocated to advanced chip packaging as demand for artificial intelligence accelerators continues to outpace foundry supply. Bottlenecks have shifted from wafer fabrication to CoWoS (Chip-on-Wafer-on-Substrate) packaging capabilities, limiting delivery schedules for major cloud hardware providers.
Capital Allocation and Yield Targets
The foundry operator plans to double its advanced packaging capacity over the next twelve months. Industry analysts note that while front-end 3nm and 5nm production yields remain high, packaging capacity remains the primary operational constraint affecting global hardware supply chains.